In this post we study the mosfet switching stage built for the proposed sinewave UPS circuit using PIC16F72.
Check with MOSFET switching circuit diagram below:
In this case U1 (IR2110) and U2 (IR2110) high side / low side mosfet driver are employed, check with data sheet of this IC to understand more. In this the two MOSFET banks with high side and low side MOSFETs are intended for transformer’s primary side switching. In this case we are discussing the functioning of bank (applying IC U1) only since the supplementary bank driving does not differ from from each other.
As soon as the inverter is ON the controller renders the pin10 of U1 is logic high which subsequently activates the high side MOSFETs (M1 - M4) ON, PWM for channel-1 from pin10 of CD4081 is applied to pin12 of the drver IC (U1) and likewise it is administered to the base of Q1 via R25. While the PWM is logic high the pin12 of U1 is also logic high and triggers the low side MOSFETs of bank 1(M9 - M12), alternately it launches the transistor
Q1 which correspondingly renders the pin10 voltage of U1 logic low, thereupon turning OFF the high side MOSFETs (M1 - M4).
Therefore it implies that by default the high logic from pin11 of the microcontroller gets switched ON for the high side MOSFETs among the two the mosfet arrays, and while the associated PWM is high the low side MOSFETs are turned ON and the high side MOSFETs are switched OFF, and through this way the switching sequence keeps repeating.
Pin11 of U1 can be used for executing the hardware locking mechanism of each of the drivers units.
By standard fixed mode this pin may be seen fixed with a low logic, but whenever under any circumstance the low side MOFET switching fails to initiate (let's assume through o/p short circuit or erroneous pulse generation at the output), the VDS voltage of low side MOSFETs can be expected to shoot up which immediately causes the output pin1 of comparator (U4) to go high and become latched with the help of D27, and render pin11 of U1 and U2 at high logic, and thereby toggle OFF the two the MOSFET driver stages effectively, preventing the MOSFETs from getting burnt and damaged.
Pin6 and pin9 is of +VCC of the IC (+5V), pin3 is of +12V for MOSFET gate drive supply, pin7 is the high side MOSFET gate drive, pin5 is the high side MOSFET receiving route, pin1 is the low side MOSFET drive, and pin2 is the low side MOSFET receiving path. pin13 is the ground of the IC (U1).
MOSFET Switching:
Check with MOSFET switching circuit diagram below:
In this case U1 (IR2110) and U2 (IR2110) high side / low side mosfet driver are employed, check with data sheet of this IC to understand more. In this the two MOSFET banks with high side and low side MOSFETs are intended for transformer’s primary side switching. In this case we are discussing the functioning of bank (applying IC U1) only since the supplementary bank driving does not differ from from each other.
As soon as the inverter is ON the controller renders the pin10 of U1 is logic high which subsequently activates the high side MOSFETs (M1 - M4) ON, PWM for channel-1 from pin10 of CD4081 is applied to pin12 of the drver IC (U1) and likewise it is administered to the base of Q1 via R25. While the PWM is logic high the pin12 of U1 is also logic high and triggers the low side MOSFETs of bank 1(M9 - M12), alternately it launches the transistor
Q1 which correspondingly renders the pin10 voltage of U1 logic low, thereupon turning OFF the high side MOSFETs (M1 - M4).
Therefore it implies that by default the high logic from pin11 of the microcontroller gets switched ON for the high side MOSFETs among the two the mosfet arrays, and while the associated PWM is high the low side MOSFETs are turned ON and the high side MOSFETs are switched OFF, and through this way the switching sequence keeps repeating.
Pin11 of U1 can be used for executing the hardware locking mechanism of each of the drivers units.
By standard fixed mode this pin may be seen fixed with a low logic, but whenever under any circumstance the low side MOFET switching fails to initiate (let's assume through o/p short circuit or erroneous pulse generation at the output), the VDS voltage of low side MOSFETs can be expected to shoot up which immediately causes the output pin1 of comparator (U4) to go high and become latched with the help of D27, and render pin11 of U1 and U2 at high logic, and thereby toggle OFF the two the MOSFET driver stages effectively, preventing the MOSFETs from getting burnt and damaged.
Pin6 and pin9 is of +VCC of the IC (+5V), pin3 is of +12V for MOSFET gate drive supply, pin7 is the high side MOSFET gate drive, pin5 is the high side MOSFET receiving route, pin1 is the low side MOSFET drive, and pin2 is the low side MOSFET receiving path. pin13 is the ground of the IC (U1).